PHY nodes

Required properties:

 - interrupts : interrupt specifier for the sole interrupt.
 - reg : The ID number for the phy, usually a small integer

Optional Properties:

- compatible: Compatible list, may contain
  "ethernet-phy-ieee802.3-c22" or "ethernet-phy-ieee802.3-c45" for
  PHYs that implement IEEE802.3 clause 22 or IEEE802.3 clause 45
  specifications. If neither of these are specified, the default is to
  assume clause 22.

  If the PHY reports an incorrect ID (or none at all) then the
  "compatible" list may contain an entry with the correct PHY ID in the
  form: "ethernet-phy-idAAAA.BBBB" where
     AAAA - The value of the 16 bit Phy Identifier 1 register as
            4 hex digits. This is the chip vendor OUI bits 3:18
     BBBB - The value of the 16 bit Phy Identifier 2 register as
            4 hex digits. This is the chip vendor OUI bits 19:24,
            followed by 10 bits of a vendor specific ID.

  The compatible list should not contain other values than those
  listed here.

- max-speed: Maximum PHY supported speed (10, 100, 1000...)

- broken-turn-around: If set, indicates the PHY device does not correctly
  release the turn around line low at the end of a MDIO transaction.

- enet-phy-lane-swap: If set, indicates the PHY will swap the TX/RX lanes to
  compensate for the board being designed with the lanes swapped.

- enet-phy-lane-no-swap: If set, indicates that PHY will disable swap of the
  TX/RX lanes. This property allows the PHY to work correcly after e.g. wrong
  bootstrap configuration caused by issues in PCB layout design.

- eee-broken-100tx:
- eee-broken-1000t:
- eee-broken-10gt:
- eee-broken-1000kx:
- eee-broken-10gkx4:
- eee-broken-10gkr:
  Mark the corresponding energy efficient ethernet mode as broken and
  request the ethernet to stop advertising it.

- phy-is-integrated: If set, indicates that the PHY is integrated into the same
  physical package as the Ethernet MAC. If needed, muxers should be configured
  to ensure the integrated PHY is used. The absence of this property indicates
  the muxers should be configured so that the external PHY is used.

- reset-gpios: The GPIO phandle and specifier for the PHY reset signal.

- reset-assert-us: Delay after the reset was asserted in microseconds.
  If this property is missing the delay will be skipped.

- reset-deassert-us: Delay after the reset was deasserted in microseconds.
  If this property is missing the delay will be skipped.

Example:

ethernet-phy@0 {
    
	compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c22";
	interrupt-parent = <&PIC>;
	interrupts = <35 IRQ_TYPE_EDGE_RISING>;
	reg = <0>;

	reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
	reset-assert-us = <1000>;
	reset-deassert-us = <2000>;
};

以下内容是谷歌翻译：

PHY节点

必需的属性：

-中断：唯一中断的中断说明符。
-reg：phy的ID号，通常是一个小整数

可选属性：

-兼容：兼容列表，可能包含
“ ethernet-phy-ieee802.3-c22”或“ ethernet-phy-ieee802.3-c45”
实现IEEE802.3第22条或IEEE802.3第45条的PHY
规格。如果均未指定，则默认为
承担第22条。

如果PHY报告错误的ID（或根本不报告），则
“兼容”列表中可能包含具有正确PHY ID的条目
形式：“ ethernet-phy-idAAAA.BBBB”，其中
AAAA-16位Phy标识符1的值注册为
4个十六进制数字。这是芯片供应商的OUI位3:18
BBBB-16位Phy标识符2寄存器的值为
4个十六进制数字。这是芯片供应商的OUI位19:24，
后跟10位卖方特定的ID。

兼容列表中不应包含其他值
在这里列出。

-最大速度：PHY支持的最大速度（10、100、1000 …）

-折断周转：如果设置，表示PHY设备未正确
在MDIO交易结束时释放转折线低点。

-enet-phy-lane-swap：如果设置，表示PHY将交换TX / RX通道至
通过交换通道来补偿正在设计的电路板。

-enet-phy-lane-no-swap：如果设置，则表示PHY将禁止交换
TX / RX通道。此属性允许PHY在例如错误
由PCB布局设计中的问题引起的自举配置。

-eee-broken-100tx：
-eee-broken-1000t：
-eee-broken-10gt：
-eee-broken-1000kx：
-eee-broken-10gkx4：
-eee-broken-10gkr：
将相应的节能以太网模式标记为已损坏，
请求以太网停止广告。

-phy-is-integrated：如果设置，则表示PHY已集成到同一PHY中
物理包作为以太网MAC。如果需要，应配置多路复用器
确保使用集成的PHY。缺少此属性表示
应该配置复用器，以便使用外部PHY。

-reset-gpios：PHY复位信号的GPIO模板和说明符。

-reset-assert-us：复位生效后的延迟，以微秒为单位。
如果缺少此属性，则将跳过延迟。

-reset-deassert-us：复位无效后的延迟，以微秒为单位。
如果缺少此属性，则将跳过延迟。

例：

ethernet-phy @ 0 {
兼容=“ ethernet-phy-id0141.0e90”，“ ethernet-phy-ieee802.3-c22”;
中断父母= <＆PIC>;
中断= <35 IRQ_TYPE_EDGE_RISING>;
reg = <0>;

reset-gpios = <＆gpio1 4 GPIO_ACTIVE_LOW>;
reset-assert-us = <1000>;
reset-deassert-us = <2000>;
};